HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 229

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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8.4.3
Wait state control register 1 (WCR1) is a 16-bit read/write register that specifies the number of
idle (wait) state cycles inserted for each area. For some memories, the drive of the data bus may
not be turned off quickly even when the read signal from the external device is turned off. This
can result in conflicts between data buses when consecutive memory accesses are to different
memories or when a write immediately follows a memory read. This LSI automatically inserts idle
states equal to the number set in WCR1 in those cases.
WCR1 is initialized to H'3FF3 by a power-on reset. It is not initialized by a manual reset or by
standby mode.
Bit
5
4
3 to 0
Wait State Control Register 1 (WCR1)
Bit Name
A2SZ1
A2SZ0
Initial Value
1
1
All 0
R/W
R/W
R/W
R
Description
Area 2 Bus Size Specification
Specify the bus sizes of physical space area 2.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
Reserved
These bits are always read as 0. The write value
should always be 0.
When port A/B is unused.
When port A/B is used.
Rev. 5.00 May 29, 2006 page 179 of 698
Section 8 Bus State Controller (BSC)
REJ09B0146-0500

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