HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 44

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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27
Figure 24.9
Figure 24.10 PLL Synchronization Settling Time when Frequency Multiplication
Figure 24.11 Reset Input Timing .............................................................................................. 620
Figure 24.12 Interrupt Signal Input Timing .............................................................................. 620
Figure 24.13 IRQOUT Timing.................................................................................................. 620
Figure 24.14 Bus Release Timing ............................................................................................. 621
Figure 24.15 Pin Drive Timing at Standby ............................................................................... 621
Figure 24.16 Basic Bus Cycle (No Wait) .................................................................................. 624
Figure 24.17 Basic Bus Cycle (One Wait) ................................................................................ 625
Figure 24.18 Basic Bus Cycle (External Wait) ......................................................................... 626
Figure 24.19 Burst ROM Bus Cycle (No Wait) ........................................................................ 627
Figure 24.20 Burst ROM Bus Cycle (Two Waits) .................................................................... 628
Figure 24.21 Burst ROM Bus Cycle (External Wait) ............................................................... 629
Figure 24.22 Synchronous DRAM Read Bus Cycle (RCD
Figure 24.23 Synchronous DRAM Read Bus Cycle (RCD
Figure 24.24 Synchronous DRAM Read Bus Cycle
Figure 24.25 Synchronous DRAM Read Bus Cycle
Figure 24.26 Synchronous DRAM Write Bus Cycle (RCD
Figure 24.27 Synchronous DRAM Write Bus Cycle (RCD
Figure 24.28 Synchronous DRAM Write Bus Cycle
Figure 24.29 Synchronous DRAM Write Bus Cycle
Figure 24.30 Synchronous DRAM Burst Read Bus Cycle
Figure 24.31 Synchronous DRAM Burst Read Bus Cycle
Figure 24.32 Synchronous DRAM Burst Read Bus Cycle
Figure 24.33 Synchronous DRAM Burst Read Bus Cycle
Figure 24.34 Synchronous DRAM Burst Write Bus Cycle
Figure 24.35 Synchronous DRAM Burst Write Bus Cycle
Figure 24.36 Synchronous DRAM Burst Write Bus Cycle
Rev. 5.00 May 29, 2006 page xlii of xlviii
PLL Synchronization Settling Time at the Returning from Standby Mode
(Return by IRQ/IRL Interrupt)............................................................................. 617
Rate Modified ...................................................................................................... 618
(Burst Read (Single Read
(Burst Read (Single Read
(Burst Mode (Single Write
(Burst Mode (Single Write
(RAS Down, Same Row Address, CAS Latency = 1) ......................................... 638
(RAS Down, Same Row Address, CAS Latency = 2) ......................................... 639
(RAS Down, Different Row Address, TPC = 0, RCD = 0, CAS Latency = 1).... 640
(RAS Down, Different Row Address, TPC = 1, RCD = 0, CAS Latency = 1).... 641
(RAS Down, Same Row Address) ....................................................................... 642
(RAS Down, Different Row Address, TPC = 0, RCD = 0) ................................. 643
(RAS Down, Different Row Address, TPC = 1, RCD = 1) ................................. 644
4), RCD
4), RCD
4), RCD
4), RCD
0, CAS Latency
1, CAS Latency
0, TPC
1, TPC
0, CAS Latency
2, CAS Latency
0, TPC
2, TPC
1, TRWL = 0)....................... 636
0, TRWL = 0)....................... 637
0, TRWL = 0) ........... 634
1, TRWL = 1) ........... 635
1, TPC
3, TPC
1, TPC
2, TPC
1) .............. 632
0) .............. 633
0) .. 630
1) .. 631

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