HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 724

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Appendix
Rev. 5.00 May 29, 2006 page 674 of 698
REJ09B0146-0500
Pin
CS2/PTC[3]
CS3/PTC[4]
CS4/PTC[5]
CS5/CE1A/PTC[6]
CS6/CE1B/PTC7]
CE2A/PTD[6]
CE2B/PTD[7]
RASL/PTD[0]
RASU/PTD[1]
CASL/PTD[2]
CASU/PTD[3]
CKE/PTD[4]
IOIS16/PTD[5]
BACK
BREQ
WAIT
DACK0/PTE[0]
DACK1/PTE[1]
DRAK0/PTE[2]
DRAK1/PTE[3]
AUDATA[0]/PTF[0]
AUDATA[1]/PTF[1]
AUDATA[2]/PTF[2]
AUDATA[3]/PTF[3]
AUDSYNC/PTF[4]
TDI/PTG[0]
TCK/PTG[1]
TMS/PTG[2]
TRST/PTG[3]
TDO/PTF[5]
FP-176C
87
88
89
90
91
92
94
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
116
118
119
120
Number of Pins
TBP-208A
T14
R14
U17
T17
R15
R16
P15
P17
N14
N15
N16
N17
M14
M15
M16
M17
L14
L15
L16
L17
K15
K16
K17
J14
J16
J17
H17
G16
G15
G14
I/O
O / I/O
O / I/O
O / I/O
O / O / I/O
O / O / I/O
O / I/O
O / I/O
O / I/O
O / I/O
O / I/O
O / I/O
O / I/O
I / I/O
O
I
I
O / I/O
O / I/O
O / I/O
O / I/O
I/O
I/O
I/O
I/O
O / I/O
I
I
I
I
O / I/O
Function
Chip select 2 / input/output port C
Chip select 3 / input/output port C
Chip select 4 / input/output port C
Chip select 5 / CE1 (area 5 PCMCIA) / input/output
port C
Chip select 6 / CE1 (area 6 PCMCIA) / input/output
port C
Area 5 PCMCIA CE2 / input/output port D
Area 6 PCMCIA CE2 / input/output port D
Lower 32 Mbytes address RAS (SDRAM) /
input/output port D
Upper 32 Mbytes address RAS (SDRAM) /
input/output port D
Lower 32 Mbytes address CAS (SDRAM) /
input/output port D
Upper 32 Mbytes address CAS (SDRAM) /
input/output port D
CK enable (SDRAM) / input/output port D
IOIS16 (PCMCIA) / input port D
Bus acknowledge
Bus request
Hardware wait request
DMA acknowledge 0 / input/output port E
DMA acknowledge 1 / input/output port E
DMA request acknowledge / input/output port E
DMA request acknowledge / input/output port E
AUD data / input/output port F
AUD data / input/output port F
AUD data / input/output port F
AUD data / input/output port F
AUD synchronous / input/output port F
Data input (H-UDI) / input port G
Clock (H-UDI) / input port G
Mode select (H-UDI) / input port G
Reset (H-UDI) / input port G
Data output (H-UDI) / input/output port F