HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 108

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 3 Memory Management Unit (MMU)
3.2.3
The translation table base register (TTB) is a 32-bit register. TTB is used to store the base address
of the current page table. The contents of this register are only modified in response to a software
command. TTB is available to use by software for general purposes.
3.2.4
The TLB exception address register (TEA) is a 32-bit register. TEA is used to store the virtual
address corresponding to a MMU or CPU address error exception after these exceptions has
occurred. This value remains valid until the next exception or interrupt occurs.
3.2.5
The MMU control register (MMUCR) makes the MMU settings. Any program that modifies
MMUCR should reside in the P1 or P2 area.
Rev. 5.00 May 29, 2006 page 58 of 698
REJ09B0146-0500
The Translation Table Base Register (TTB)
The TLB Exception Address Register (TEA)
MMU Control Register (MMUCR)