HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 480
HD6417706F133
Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417706F133V.pdf
(751 pages)
Specifications of HD6417706F133
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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Section 15 Smart Card Interface
2. Setting the bit rate register (SCBRR): Set the bit rate. See section 15.4.5, Clock, to see how to
3. Setting the serial control register (SCSCR): The TIE, RIE, TE and RE bits function as they do
4. Setting the smart card mode register (SCSCMR): The SDIR and SINV bits are both set to 0 for
Figure 15.4 shows sample waveforms for register settings of the two types of IC cards (direct
convention and inverse convention) and their start characters.
In the direct convention type, the logical 1 level is state Z, the logical 0 level is state A, and
communication is LSB first. The start character data is H'3B. The parity bit is even (as specified in
the smart card standards), and thus 1.
In the inverse convention type, the logical 1 level is state A, the logical 0 level is state Z, and
communication is MSB first. The start character data is H'3F. The parity bit is even (as specified
in the smart card standards), and thus 0, which corresponds to state Z.
Only data bits D7 to D0 are inverted by the SINV bit. To invert the parity bit, set the O/E bit in
SCSMR to odd parity mode. This applies to both transmission and reception.
Rev. 5.00 May 29, 2006 page 430 of 698
REJ09B0146-0500
calculate the set value.
for the ordinary SCI. See section 14, Serial Communication Interface (SCI), for more
information. The CKE0 bit specifies the clock output. When no clock is output, set 0; when a
clock is output, set 1.
IC cards that use the direct convention and both to 1 when the inverse convention is used. The
SMIF bit is set to 1 for the smart card interface.
(Z)
(Z)
Ds
Ds
A
A
Figure 15.4 Waveform of Start Character
Z
D0
Z
D7
b. Inverse convention (SDIR, SINV, and O/E are all 1)
a. Direct convention (SDIR, SINV, and O/E are all 0)
Z
D1
Z
D6
A
D2
A
D5
Z
D3
A
D4
Z
D4
A
D3
Z
D5
A
D2
A
D6
A
D1
A
D7
A
D0
Dp
Dp
Z
Z
(Z)
(Z)
State
State
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