HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 106

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 3 Memory Management Unit (MMU)
Address Space Identifier (ASID): In multiple virtual memory mode, the address space identifier
(ASID) is used to differentiate between processes running in parallel and sharing virtual address
space. The ASID is 8 bits in length and can be set by software setting of the ASID of the currently
running process in page table entry register high (PTEH) within the MMU. When the process is
switched using the ASID, the TLB does not have to be purged.
In single virtual memory mode, the ASID is used to provide memory protection for processes
running simulataneously and using the virtual address space exclusively.
3.2
There are five registers for MMU processing. These are located in address space area P4 and can
only be accessed from privileged mode by specifying the address.
These registers for MMU processing are shown below. Refer to section 23, List of Registers, for
more details of the addresses and access sizes.
Rev. 5.00 May 29, 2006 page 56 of 698
REJ09B0146-0500
Page table entry register high (PTEH)
Page table entry register low (PTEL)
Translation table base register (TTB)
TLB exception address register (TEA)
MMU control register (MMUCR)
Register Description