HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 568

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 18 I/O Ports
18.6.2
Port F data register (PFDR) is an 8-bit register composed of a 1-bit readable register and a 7-bit
readable/writable register. This register stores data for pins PTF6 to PTF0. PF6DT to PF0DT bit
corresponds to PTF6 to PTF0 pin. When the function is general input port, if the port is read the
corresponding pin level is read.
PFDR is initialized by a power-on reset, after which the general input port function (pull-up MOS
on) is set as the initial pin function, and the corresponding pin levels are read. It retains its
previous value in standby mode and sleep mode, and in a manual reset.
Bit
7
6
5
4
3
2
1
0
Table 18.6 Read/Write Operation of the Port F Data Register (PFDR)
PFnMD1 PFnMD0 Pin State
0
1
Note: n = 0 to 6
Rev. 5.00 May 29, 2006 page 518 of 698
REJ09B0146-0500
Port F Data Register (PFDR)
0
1
0
1
Bit Name
PF6DT
PF5DT
PF4DT
PF3DT
PF2DT
PF1DT
PF0DT
Other functions PFDR value
Output
Input (Pull-up
MOS: on)
Input (Pull-up
MOS: off)
Initial Value
0
0
0
0
0
0
0
0
Read
PFDR value
Pin state
Pin state
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved
Description
Table 18.6 shows the function of PFDR.
Write
Can be written to PFDR but does not affect
the pin state.
A value to be written is output from the pin.
Can be written to PFDR but does not affect
the pin state.
Can be written to PFDR but does not affect
the pin state.

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