HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 304

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 9 Direct Memory Access Controller (DMAC)
9.2
Table 9.1 shows the DMAC pins.
Table 9.1
9.3
DMAC has a total of 17 registers. Each channel has four control registers. One other control
register is shared by all channels.
Refer to section 23, List of Registers, for more details of the addresses and access sizes.
Channel 0
Channel 1
Rev. 5.00 May 29, 2006 page 254 of 698
REJ09B0146-0500
Channel Name
0
1
DMA source address register 0 (SAR0)
DMA destination address register 0 (DAR0)
DMA transfer count register 0 (DMATCR0)
DMA channel control register 0 (CHCR0)
DMA source address register 1 (SAR1)
DMA destination address register 1 (DAR1)
DMA transfer count register 1 (DMATCR1)
DMA channel control register 1 (CHCR1)
Register Description
Input/Output Pin
DMA transfer request
DREQ acknowledge
DMA request
acknowledge
DMA transfer request
DREQ acknowledge
DMA request
acknowledge
Pin Configuration
Symbol
DREQ0
DACK0
DRAK0
DREQ1
DACK1
DRAK1
I/O
I
O
O
I
O
O
Function
DMA transfer request input from
external device to channel 0
Strobe output to an external I/O at DMA
transfer request from external device to
channel 0
Output showing that DREQ0 has been
accepted
DMA transfer request input from
external device to channel 1
Strobe output to an external I/O at DMA
transfer request from external device to
channel 1
Output showing that DREQ1 has been
accepted