HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 23

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Item
B.1 Pin Functions
Table B.1 Pin States
during Resets, Power-
Down States, and Bus-
Released State
B.3 Processing of
Unused Pins
Page
669
671
672
677
Revision (See Manual for Details)
Table amended and note 12 added
Notes: 12. In the standby mode, CKIO may be either high or
low level.
Description amended
• When EXTAL pin is not used
— EXTAL: Connect to V
Interrupt
Category
Port
H-UDI
Category
Clock
Pin
EXTAL
XTAL
CKIO
EXTAL2
XTAL2
CAP1, CAP2
IRQ[3:0]/IRL[3:0]/
PTH[3:0]
IRQ4/ PTH[4]
NMI
IRQOUT/PTE[7]
Pin
CE2B/PTD[7]
CE2A/PTD[6]
IOIS16/PTD[5]
ADTRG/PTG[5]
TCK/PTG[1]
TDI/PTG[0]
TMS/PTG[2]
TRST/PTG[3]
AUDSYNC/PTF[4]
TDO/PTF[5]
AUDCK/PTG[4]
AUDATA[3:0]/PTF[3:0] IV
ASEBRKAK/PTF[6]
ASEMD0
Rev. 5.00 May 29, 2006 page xxi of xlviii
CC
Power-On
Reset
H
H
I
V *
IV
IV
IV
IV
OV
OV
IV
OV
I
Power-On
Reset
I
O *
IO *
I
O
—
I *
I *
I
H
8
8
Q or V
8
1
1
Reset
Reset
I
I
I
OP *
Manual
Reset
OP *
OP *
I
I
I
I
I
I
OP *
OP *
I
I
OP *
I
Manual
Reset
I
O *
IO *
I
O
—
SS
Q
1
1
3
3
3
3
3
3
I
I
I
ZK *
Standby
ZH *
ZH *
Z
IZ
IZ
IZ
IZ
IZ
OK *
OK *
IZ
IZ
OP *
Z
Standby
I
O *
IO *
I
O
—
1
Power-Down
1
Power-Down
3
11
11
3
3
3
*
12
K *
K *
3
3
Sleep
OP *
OP *
I
I
I
I
I
I
OP *
OP *
I
I
OP *
I
I
O *
IO *
I
O
—
I
I
I
OP *
Sleep
1
1
3
3
3
3
3
3
Bus
Released
ZP *
ZP *
I
I
I
I
I
I
OP *
OP *
I
I
OP *
I
Bus
Released
I
O *
IO *
I
O
—
I
I
I
OP *
1
1
3
3
3
3
3
3