HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 522

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 16 Serial Communication Interface with FIFO (SCIF)
Rev. 5.00 May 29, 2006 page 472 of 698
REJ09B0146-0500
Clear TE and RE bits in SCSCR2 to 0
bits in SCSCR2 (leaving TE and RE
Set data transfer format in SCSMR2
Set RTRG1-0, TTRG1-0, and MCE
Clear TFRST and RFRST bits to 0
SCSCR2 to 1,and set RIE, TIE,
Set TFRST and RFRST bits in
Set TE and RE bits in
1-bit interval elapsed?
Set CKE1 and CKE0
Set value in SCBRR2
TEIE, and MPIE bits
bits cleared to 0)
SCFCR2 to 1
Initialization
in SCFCR2
Figure 16.5 Sample SCIF Initialization Flowchart
End
Yes
Wait
No
1. Set the clock selection in SCSCR2.
2. Set the data transfer format in SCSMR2.
3. Write a value corresponding to the SCBRR2.
4. Wait at least one bit interval, then set the
Be sure to clear bits RIE TIE, TE, and RE
to 0.
When clock output is selected, it is output
immediately after SCSCR2 settings are made.
(Not necessary if an external clock is used.)
TE bit or RE bit in SCSR2 to 1. Also set the
RIE and TIE bits.
Setting the TE and RE bits enables the
TxD2 and RxD2 pins to be used. When
transmitting, the SCIF will go to the mark
state; when receiving, it will go to the idle
state, waiting for a start bit.