HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 45

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Figure 24.37 Synchronous DRAM Auto-Refresh Timing (TRAS = 1, TPC = 1) ..................... 645
Figure 24.38 Synchronous DRAM Self-Refresh Cycle (TPC
Figure 24.39 Synchronous DRAM Mode Register Write Cycle ............................................... 646
Figure 24.40 PCMCIA Memory Bus Cycle (TED = 0, TEH = 0, No Wait) ............................. 647
Figure 24.41 PCMCIA Memory Bus Cycle (TED = 2, TEH = 1, One Wait, External Wait) ... 648
Figure 24.42 PCMCIA Memory Bus Cycle (Burst Read, TED = 0, TEH = 0, No Wait) ......... 649
Figure 24.43 PCMCIA Memory Bus Cycle
Figure 24.44 PCMCIA I/O Bus Cycle (TED = 0, TEH = 0, No Wait) ..................................... 651
Figure 24.45 PCMCIA I/O Bus Cycle (TED = 2, TEH = 1, One Wait, External Wait) ........... 652
Figure 24.46 PCMCIA I/O Bus Cycle (TED = 1, TEH = 1, One Wait, Bus Sizing) ................ 653
Figure 24.47 TCLK Input Timing............................................................................................. 655
Figure 24.48 TCLK Clock Input Timing .................................................................................. 655
Figure 24.49 Oscillation Settling Time at RTC Crystal Oscillator Power-on ........................... 655
Figure 24.50 SCK Input Clock Timing ..................................................................................... 655
Figure 24.51 SCI I/O Timing in Clock Synchronous Mode...................................................... 656
Figure 24.52 I/O Port Timing.................................................................................................... 656
Figure 24.53 DREQ Input Timing ............................................................................................ 657
Figure 24.54 DRAK Output Timing ......................................................................................... 657
Figure 24.55 TCK Input Timing ............................................................................................... 658
Figure 24.56 TRST Input Timing (Reset Hold) ........................................................................ 659
Figure 24.57 H-UDI Data Transfer Timing .............................................................................. 659
Figure 24.58 ASEMD0 Input Timing ....................................................................................... 659
Figure 24.59 AUD Timing ........................................................................................................ 660
Figure 24.60 External Trigger Input Timing............................................................................. 661
Figure 24.61 A/D Conversion Timing ...................................................................................... 661
Figure 24.62 Output Load Circuit ............................................................................................. 662
Figure 24.63 Load Capacitance vs. Delay Time ....................................................................... 663
Appendix
Figure D.1
Figure D.2
(Burst Read, TED = 1, TEH = 1, Two Waits, Burst Pitch = 3)............................ 650
Package Dimensions (FP-176C) .......................................................................... 693
Package Dimensions (TBP-208A) ....................................................................... 694
Rev. 5.00 May 29, 2006 page xliii of xlviii
0) ........................................... 645

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