HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 570

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417706F133
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6417706F133V
Manufacturer:
EDISON
Quantity:
2 000
Part Number:
HD6417706F133V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417706F133V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
HD6417706F133V
Quantity:
27
Section 18 I/O Ports
18.7.2
Port G data register (PGDR) is an 8-bit read register that stores data for pins PTG5 to PTG0.
PG5DT to PG0DT bit corresponds to PTG5 to PTG0 pin. When the function is general input port,
if the port is read the corresponding pin level is read.
PGDR is initialized by a power-on reset, after which the general input port function (pull-up MOS
on) is set as the initial pin function, and the corresponding pin levels are read. It retains its
previous value in standby mode and sleep mode, and in a manual reset.
Bit
7
6
5
4
3
2
1
0
Legend: * Undefined
Table 18.7 Read/Write Operation of the Port G Data Register (PGDR)
PGnMD1 PGnMD0 Pin State
0
1
Note: n = 0 to 5
Rev. 5.00 May 29, 2006 page 520 of 698
REJ09B0146-0500
Port G Data Register (PGDR)
0
1
0
1
Bit Name
PG5DT
PG4DT
PG3DT
PG2DT
PG1DT
PG0DT
Other function Low level
Reserved
Input (Pull-up
MOS: on)
Input (Pull-up
MOS: off)
Initial Value
*
*
*
*
*
*
*
*
Read
Pin state
Pin state
R/W
R
R
R
R
R
R
R
R
Reserved
Table 18.7 shows the function of PGDR.
Description
Write
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)

Related parts for HD6417706F133