HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 73

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

2.3.2
Addressing modes and effective address calculation methods are shown in table 2.2.
Table 2.2
Addressing
Mode
Register
direct
Register
indirect
Register
indirect with
post-
increment
Register
indirect with
pre-
decrement
Addressing Modes
Addressing Modes and Effective Addresses
Instruction
Format
Rn
@Rn
@Rn+
@–Rn
Effective Address Calculation Method
Effective address is register Rn. (Operand
is register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents.
A constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Effective address is register Rn contents,
decremented by a constant beforehand:
1 for a byte operand, 2 for a word operand,
4 for a longword operand.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rev. 5.00 May 29, 2006 page 23 of 698
Rn – 1/2/4
Rn
Rn
Calculation Formula
—
Rn
Rn
After instruction
execution
Byte: Rn + 1
Word: Rn + 2
Longword: Rn + 4
Rn
Byte: Rn – 1
Word: Rn – 2
Longword: Rn – 4
Rn
(Instruction executed
with Rn after
calculation)
REJ09B0146-0500
Section 2 CPU
Rn
Rn
Rn
Rn