HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 508

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 16 Serial Communication Interface with FIFO (SCIF)
Bit
1
Rev. 5.00 May 29, 2006 page 458 of 698
REJ09B0146-0500
Bit Name
RDF
Initial
Value
0
R/W
R/(W) * Receive FIFO Data Full
Description
Indicates that received data is transferred to the
SCFRDR2, the quantity of data in SCFRDR becomes more
than the number of receive triggers specified by the
RTRG1 and RTRG0 bits in SCFCR2.
0: The quantity of transmit data written to SCFRDR2 is less
1: The quantity of receive data in SCFRDR2 is more than
Note: * Since SCFTDR2 is a 16-byte FIFO register, the
than the specified number of receive triggers.
[Clearing conditions]
1. The chip is power-on reset or enters standby mode.
2. When SCFRDR2 is read until the quantity of receive
[Setting condition]
The quantity of receive data which is greater than the
specified number of receive triggers is being stored to
SCFRDR2. *
the specified number of receive triggers.
data in SCFRDR2 becomes less than the specified
number of receive triggers, software reads RDF after
it has been set to 1, and then writes 0 to RDF.
maximum quantity of data which can be read when
RDF is 1 is the specified number of receive triggers.
If attempted to read after all data in the SCFRDR2
have been read, the data is undefined. The quantity
of receive data in SCFRDR2 is indicated by the
lower 8 bits of SCFTDR2.