HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 574

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 18 I/O Ports
18.9.2
Port J data register (PJDR) is an 8-bit read register that stores data for pins PTJ7 to PTJ0. PJ3DT
to PJ0DT bit corresponds to PTJ3 to PTJ0 pin. When the pin function is general output port, if the
port is read the value of the corresponding PJDR bit is returned directly. When the function is
general input port, if the port is read, the corresponding pin level is read.
Bit
7
6
5
4
3
2
1
0
Table 18.9 Read/Write Operation of the Port J Data Register (PJDR)
PJnMD1
0
1
Note: n = 0 to 3
Rev. 5.00 May 29, 2006 page 524 of 698
REJ09B0146-0500
Port J Data Register (PJDR)
PJnMD0
0
1
0
1
Bit Name
PJ3DT
PJ2DT
PJ1DT
PJ0DT
Pin State
Other function Low level
Reserved
(Setting
prohibited)
Input
Input
Initial Value
0
0
0
0
0
0
0
0
Read
Pin state
Pin state
R/W
R
R
R
R
R
R
R
R
Reserved
Table 18.9 shows the function of PJDR.
Description
Write
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)
Ignored (no affect on pin state)

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