HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 197

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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7.2.9
BRCR sets the following conditions:
1. Channels A and B are used in two independent channels condition or under the sequential
2. A break is set before or after instruction execution.
3. A break is set by the number of execution times.
4. Determine whether to include data bus on channel B in comparison conditions.
5. Enable PC trace.
6. Enable the ASID check.
The break control register (BRCR) is a 32-bit read/write register that has break conditions match
flags and bits for setting a variety of break conditions.
Bit
31 to 22 —
21
20
19 to 16 —
condition.
Break Control Register (BRCR)
BASMA
BASMB
Bit Name
Initial Value
All 0
0
0
All 0
R/W
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Break ASID Mask A
Specifies whether the bits of the channel A break
ASID7 to ASID0 (BASA7 to BASA0) set in
BASRA are masked or not.
0: All BASRA bits are included in break
1: No BASRA bits are included in break
Break ASID Mask B
Specifies whether the bits of channel B break
ASID7 to ASID0 (BASB7 to BASB0) set in
BASRB are masked or not.
0: All BASRB bits are included in break
1: No BASRB bits are included in break
Reserved
These bits are always read as 0. The write value
should always be 0.
condition, ASID is checked
condition, ASID is not checked
condition, ASID is checked
condition, ASID is not checked
Rev. 5.00 May 29, 2006 page 147 of 698
Section 7 User Break Controller
REJ09B0146-0500

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