HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 404

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 13 Realtime Clock (RTC)
13.3.16 RTC Control Register 2 (RCR2)
The RTC control register 2 (RCR2) is an 8-bit read/write register for periodic interrupt control, 30-
second adjustment ADJ, divider circuit RESET, and RTC count start/stop control. It is initialized
to H'09 by a power-on reset. It is initialized except for RTCEN and START by a manual reset. It is
not initialized in standby mode, and retains its contents.
Rev. 5.00 May 29, 2006 page 354 of 698
REJ09B0146-0500
Bit
7
6
5
4
3
Bit Name
PEF
PES2
PES1
PES0
RTCEN
Initial Value
0
0
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
Description
Periodic Interrupt Flag
Indicates interrupt generation with the period
designated by the PES bits. When set to 1, PEF
generates periodic interrupts.
0: Interrupts not generated with the period
1: Interrupts generated with the period designated by
Periodic Interrupt Flags
These bits specify the periodic interrupt.
000: No periodic interrupts generated
001: Periodic interrupt generated every 1/256
010: Periodic interrupt generated every 1/64 second
011: Periodic interrupt generated every 1/16 second
100: Periodic interrupt generated every 1/4 second
101: Periodic interrupt generated every 1/2 second
110: Periodic interrupt generated every 1 second
111: Periodic interrupt generated every 2 seconds
Controls the operation of the crystal oscillator for the
RTC.
0: Halts the crystal oscillator for the RTC.
1: Runs the crystal oscillator for the RTC.
designated by the PES bits.
[Clearing condition]
When 0 is written to PEF
the PES bits.
[Setting condition]
When 1 is written to PEF
second

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