HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 43

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Figure 19.8
Figure 19.9
Figure 19.10 Definitions of A/D Conversion Accuracy............................................................ 546
Figure 19.11 Example of Analog Input Protection Circuit ....................................................... 547
Figure 19.12 Analog Input Pin Equivalent Circuit.................................................................... 547
Section 20 D/A Converter (DAC)
Figure 20.1
Figure 20.2
Section 21 User Debugging Interface (H-UDI)
Figure 21.1
Figure 21.2
Figure 21.3
Section 22 Power-Down Modes
Figure 22.1
Figure 22.2
Figure 22.3
Figure 22.4
Figure 22.5
Figure 22.6
Figure 22.7
Figure 22.8
Figure 22.9
Figure 22.10 Hardware Standby Mode (When CA Goes Low in Normal Operation) .............. 583
Figure 22.11 Hardware Standby Mode Timing (When CA Goes Low during WDT
Section 24 Electrical Characteristics
Power-On Sequence..................................................................................................................... 608
Figure 24.1
Figure 24.2
Figure 24.3
Figure 24.4
Figure 24.5
Figure 24.6
Figure 24.7
Figure 24.8
A/D Conversion Timing ...................................................................................... 544
External Trigger Input Timing............................................................................. 545
D/A Converter Block Diagram ............................................................................ 549
Example of D/A Converter Operation ................................................................. 552
H-UDI Block Diagram......................................................................................... 553
TAP Controller State Transitions......................................................................... 561
H-UDI Reset ........................................................................................................ 563
Canceling Software Standby Mode with STBCR.STBY..................................... 575
Power-On Reset STATUS Output ....................................................................... 578
Manual Reset STATUS Output ........................................................................... 578
Software Standby to Interrupt STATUS Output .................................................. 579
Software Standby to Power-On Reset STATUS Output...................................... 579
Software Standby to Manual Reset STATUS Output .......................................... 580
Sleep to Interrupt STATUS Output ..................................................................... 580
Sleep to Power-On Reset STATUS Output ......................................................... 581
Sleep to Manual Reset STATUS Output ............................................................. 581
Operation on Standby Mode Cancellation).......................................................... 584
EXTAL Clock Input Timing................................................................................ 614
CKIO Clock Input Timing ................................................................................... 614
CKIO Clock Output Timing ................................................................................ 614
Power-On Oscillation Settling Time.................................................................... 615
Oscillation Settling Time at Standby Return (Return by Reset) .......................... 615
Oscillation Settling Time at Standby Return (Return by NMI) ........................... 616
Oscillation Settling Time at Standby Return (Return by IRQ or IRL)................. 616
PLL Synchronization Settling Time by Reset or NMI at the Returning
from Standby Mode (Return by Reset or NMI) ................................................... 617
Rev. 5.00 May 29, 2006 page xli of xlviii