HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 484

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 15 Smart Card Interface
Serial Data Transmission: The processing procedures in the smart card mode differ from
ordinary SCI processing because data is retransmitted when an error signal is sampled during a
data transmission. An example of transmission processing flowchart is shown in figure 15.6.
1. Initialize the smart card interface mode as described in Initialization above.
2. Check that the FER/ERS bit in SCSSR is cleared to 0.
3. Repeat steps 2 and 3 until the TEND flag in SCSSR is set to 1.
4. Write the transmit data into SCTDR, clear the TDRE flag to 0 and start transmitting. The
5. To transmit more data, return to step 2.
6. To end transmission, clear the TE bit to 0.
Rev. 5.00 May 29, 2006 page 434 of 698
REJ09B0146-0500
TEND flag will be cleared to 0.
Figure 15.5 Initialization Flowchart (Example)
Clear TE and RE bits in SCSCR to 0
Set SCSCR's CKE1 and CKE0 bits
TE, RE, MPIE, and TEIE bits to 0
Set SCSMR's O/E bit to parity,
to the clock and clear TIE, RIE,
set CKS1 and CKS0 bits to
Clear SCSSR's FER/ERS,
PER and ORER flags to 0
Set SCSMR's SMIF, SDIR,
TIE, RIE, TE, and RE bits
the clock and set C/A
Set value in SCBRR
interval elapsed?
Set SCSCR's
and SINV bits
Has a 1-bit
Initialize
End
Yes
Wait
No