HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 308

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 9 Direct Memory Access Controller (DMAC)
Rev. 5.00 May 29, 2006 page 258 of 698
REJ09B0146-0500
Bit
17
16
15
14
Bit Name
AM
AL
DM1
DM0
Initial Value
0
0
0
0
R/W
(R/W) *
(R/W) *
R/W
R/W
2
2
Description
Acknowledge Mode
AM specifies whether DACK is output in data read
cycle or in data write cycle in dual address mode.
This bit is only valid in CHCR_0 and CHCR_1.
Writing to this bit is invalid in CHCR_2 and
CHCR_3; 0 is read if this bit is read.
0: DACK output in read cycle
1: DACK output in write cycle
Acknowledge Level
AL specifies the DACK (acknowledge) signal
output is high active or low active.
This bit is only valid in CHCR_0 and CHCR_1.
Writing to this bit is invalid in CHCR_2 and
CHCR_3; 0 is read if this bit is read.
0: Low-active output of DACK
1: High-active output of DACK
Destination Address Mode
DM1 and DM0 select whether the DMA
destination address is incremented, decremented,
or left fixed.
00: Fixed destination address (Initial value)
01: Destination address is incremented (+1 in 8-
10: Destination address is decremented (–1 in 8-
11: Reserved (Setting prohibited)
bit transfer, +2 in 16-bit transfer, +4 in 32-bit
transfer, +16 in 16-byte transfer)
bit transfer, –2 in 16-bit transfer, –4 in 32-bit
transfer; illegal setting in 16-byte transfer)