HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 138

IC SUPERH MPU ROMLESS 176LQFP

HD6417706F133

Manufacturer Part Number
HD6417706F133
Description
IC SUPERH MPU ROMLESS 176LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417706F133

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.75 V ~ 2.05 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Section 4 Exception Processing
4.2.2
The interrupt event register (INTEVT) contains a 12-bit interrupt exception code or a code
indicating the interrupt priority. Which is set when an interrupt occurs depends on the interrupt
source (refer to section 6, Interrupt Controller (INTC)). The exception code or interrupt priority
code is set automatically by hardware when an exception occurs. INTEVT can also be modified by
software.
4.2.3
The interrupt event register 2 (INTEVT2) contains a 12-bit exception code. The exception code set
in INTEVT2 is that for an interrupt request. The exception code is set automatically by hardware
when an exception occurs.
Rev. 5.00 May 29, 2006 page 88 of 698
REJ09B0146-0500
Bit
31 to 12
11 to 0
Bit
31 to 12
11 to 0
Interrupt Event Register (INTEVT)
Interrupt Event Register 2 (INTEVT2)
Bit Name
Bit Name
Initial Value R/W
All 0
Initial Value R/W
All 0
R
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
12-bit interrupt exception code or a code indicating
the interrupt priority
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
12-bit exception code

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