HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 161

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5.4.3
1. Invalidating Specific Entries
2. Reading the Data of a Specific Entry
; R0 H'0110 0010; VPN B'00 0000 0100 0100 0000 0000, U 0, V 0
; R1 H'F000 0088; address array access, entry B'0000 1000, A 1
;
MOV.L R0,@R1
; R1 H'F100 004C; data array access, entry B'0000 0100, Way 0,
; longword address 3
;
MOV.L @R0,R1 ; Longword 3 is read.
Specific cache entries can be invalidated by writing 0 to the entry's U and V bit. When the A
bit is 1, the address tag specified by the write data is compared to the address tag within the
cache selected by the entry address, and data is written when a match is found. If no match is
found, there is no operation. When the V bit of the entry is 1, a write back occurs.
This example reads the data section of a specific cache entry. The longword indicated in the
data field of the data array in figure 5.6 is read to the register.
Usage Examples
Rev. 5.00 May 29, 2006 page 111 of 698
REJ09B0146-0500
Section 5 Cache