HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 497

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

16.3.5
The serial mode register2 (SCSMR2) is an eight-bit register that specifies the SCIF serial
communication format and selects the clock source for the baud rate generator.
The CPU can always read and write the SCSMR2.
Bit
7
6
5
Bit Name
—
CHR
PE
Serial Mode Register 2 (SCSMR2)
Initial
Value
0
0
0
R/W
R
R/W
R/W
Section 16 Serial Communication Interface with FIFO (SCIF)
Description
Reserved
This bit is always read 0. The write value should always be
0.
Character Length
Selects seven-bit or eight-bit data in the asynchronous
mode.
0: Eight-bit data.
1: Seven-bit data.
Parity Enable
Selects whether to add a parity bit to transmit data and to
check the parity of receive data.
0: Parity bit not added or checked.
1: Parity bit added and checked.
Note: When seven-bit data is selected, the MSB (bit 7)
in SCFTPR2 is not transmitted.
Note: When PE is set to 1, an even or odd parity bit is
added to transmit data, depending on the parity mode
(O/E) setting. Receive data parity is checked according
to the even/odd (O/E) mode setting.
Rev. 5.00 May 29, 2006 page 447 of 698
REJ09B0146-0500