HD6417706F133 Renesas Electronics America, HD6417706F133 Datasheet - Page 519

• Manufacturer Part Number: HD6417706F133
• Description: IC SUPERH MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417706F133

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.75 V ~ 2.05 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

16.4
For serial communication, the SCIF has an asynchronous mode in which characters are
synchronized individually. Refer to section 14.4.1, Operation in Asynchronous Mode (SCI). The
SCIF has the 16-byte FIFO buffer for both transmit and receive, reduces an overhead of the CPU,
and enables continuous high-speed communication. Moreover, it has the RTS2 and CTS2 signals
as the modem control signals. The transmission format is selected in the SCSMR2, as listed in
table 16.6. The SCI clock source is selected by the combination of the CKE1 and CKE0 bits in
SCSCR2, as listed in table 16.6.
Table 16.6 SCSMR2 Settings and SCIF Communication Formats
Mode
Asynchronous
Data length is selectable: seven or eight bits.
Parity and multiprocessor bits are selectable. So is the stop bit length (one or two bits). The
combination of the preceding selections constitutes the communication format and character
length.
In receiving, it is possible to detect framing errors (FER), parity errors (PER), receive FIFO
data full, receive data ready, and breaks.
In transmitting, it is possible to detect transmit FIFO data empty.
The number of stored data for both the transmit and receive FIFO registers is displayed.
An internal or external clock can be selected as the SCIF clock source.
When an internal clock is selected, the SCIF operates using the on-chip baud rate
generator, and can output a serial clock signal with a frequency 16 times the bit rate.
When an external clock is selected, the external clock input must have a frequency 16 times
the bit rate. (The on-chip baud rate generator is not used.)
Operation
Bit 6
CHR
0
1
Bit 5
PE
0
1
0
1
SCSMR2 Settings
Bit 3
STOP
0
1
0
1
0
1
0
1
Section 16 Serial Communication Interface with FIFO (SCIF)
Data
Length
8-bit
7-bit
Parity
Bit
Not set
Set
Not set
Set
Rev. 5.00 May 29, 2006 page 469 of 698
SCIF Communication Format
Stop Bit Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
REJ09B0146-0500