EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 1151
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
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ALTERA/阿尔特拉
Quantity:
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- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
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- Download datasheet (32Mb)
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
SIV54002-1.5
Adaptive Equalization (AEQ)
Decision Feedback Equalization (DFE)
Power-On Reset Circuitry
Power-On Reset Specifications
Stratix IV Device Handbook Volume 4
February 2011
February 2011
SIV54002-1.5
f
f
f
This chapter describes changes to the published version of the
Handbook.
main handbook chapters or in
Devices.
This information is now located in the
chapter.
For more information about the DFE feature, refer to
Equalization in Stratix IV
This information is now located in the
Devices
This information is now located in the
Devices
chapter.
chapter.
All changes from Revision 1.4 of this chapter are now incorporated in the
Devices.
2. Addendum to the Stratix IV Device
AN 612: Decision Feedback Equalization in Stratix IV
Dynamic Reconfiguration in Stratix IV Devices
Hot Socketing and Power-On Reset in Stratix IV
Hot Socketing and Power-On Reset in Stratix IV
AN 612: Decision Feedback
Stratix IV Device
Handbook
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