EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 885
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Table 5–9. tx_datainfull[43:0] FPGA Fabric-Transceiver Channel Interface Signal Descriptions (Part 2 of 2)
February 2011 Altera Corporation
20-bit FPGA fabric-transceiver
Channel Interface with PCS-PMA set
to 10 bits
32-bit FPGA fabric-transceiver
Channel Interface with PCS-PMA set
to 16/20 bits
40-bit FPGA fabric-transceiver
Channel Interface with PCS-PMA set
to 20 bits
Note to
(1) For all transceiver-related ports, refer to the “Transceiver Port Lists” section in the
FPGA Fabric-Transceiver Channel
Table
Interface Description
5–9:
Two 10-bit Data (tx_datain)
tx_datainfull[9:0] - tx_datain (LSByte) and tx_datainfull[31:22] -
tx_datain (MSByte)
Four 8-bit Data (tx_datain)
tx_datainfull[7:0]- tx_datain (LSByte) and
tx_datainfull[18:11]
tx_datainfull[29:22]
tx_datainfull[40:33] - tx_datain (MSByte)
The following signals are used only in 8B/10B modes:
Four Control Bits (tx_ctrlenable)
tx_datainfull[8] - tx_ctrlenable (LSB) and
tx_datainfull[19]
tx_datainfull[30]
tx_datainfull[41]- tx_ctrlenable (MSB)
Force Disparity Enable (tx_forcedisp)
tx_datainfull[9]- tx_forcedisp (LSB) and
tx_datainfull[20]
tx_datainfull[31]
tx_datainfull[42]- tx_forcedisp (MSB)
Force Disparity Value (tx_dispval)
tx_datainfull[10]- tx_dispval (LSB) and
tx_datainfull[21]
tx_datainfull[32]
tx_datainfull[43]- tx_dispval (MSB)
Four 10-bit Data (tx_datain)
tx_datainfull[9:0] - tx_datain (LSByte) and
tx_datainfull[20:11]
tx_datainfull[31:22]
tx_datainfull[42:33]- tx_datain (MSByte)
Transmit Signal Description (Based on Stratix IV GX Supported FPGA
Fabric-Transceiver Channel Interface Widths)
Transceiver Architecture for Stratix IV Devices
Stratix IV Device Handbook Volume 2: Transceivers
chapter.
(Note 1)
5–39
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