EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 37

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

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SIV51002-3.1
Logic Array Blocks
Stratix IV Device Handbook Volume 1
February 2011
February 2011
SIV51002-3.1
This chapter describes the features of the logic array blocks (LABs) in the Stratix
core fabric. LABs are made up of adaptive logic modules (ALMs) that you can
configure to implement logic functions, arithmetic functions, and register functions.
LABs and ALMs are the basic building blocks of the Stratix IV device. Use these to
configure logic, arithmetic, and register functions. The ALM provides advanced
features with efficient logic usage and is completely backward-compatible.
This chapter contains the following sections:
■
■
Each LAB consists of ten ALMs, various carry chains, shared arithmetic chains, LAB
control signals, local interconnect, and register chain connection lines. The local
interconnect transfers signals between ALMs in the same LAB. The direct link
interconnect allows the LAB to drive into the local interconnect of its left and right
neighbors. Register chain connections transfer the output of the ALM register to the
adjacent ALM register in the LAB. The Quartus
the LAB or adjacent LABs, allowing the use of local, shared arithmetic chain, and
register chain connections for performance and area efficiency.
“Logic Array Blocks”
“Adaptive Logic Modules” on page 2–5
2. Logic Array Blocks and Adaptive Logic
Modules in Stratix IV Devices
®
II Compiler places associated logic in
®
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IV