EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 987
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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- EP4SGX110DF29C3N PDF datasheet
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Chapter 1: ALTGX Transceiver Setup Guide for Stratix IV Devices
Reconfiguration Settings
Table 1–7. MegaWizard Plug-In Manager Options (Modes Screen) (Part 2 of 2)
February 2011 Altera Corporation
How many input clocks are
used?
What is the starting channel
number?
ALTGX Setting
Transmitter PLL Settings
1
Depending on the number of additional PLLs you select in the How many additional
PLLs are used? option in Reconfiguration Settings, the corresponding PLL screens
become available.
Each of these PLL screens have the same settings available for selection.
each of these settings.
The Main PLL is the PLL you configure in the General screen. Therefore, some of the
options are already enabled or disabled for this PLL. Some of the options differ when
compared with the additional transmitter PLLs.
Enter the number of input clocks available for selection for
the transmitter PLLs and receiver PLL. You have a choice of
up to 10 input clock sources (clock 1, clock 2, and so on).
You must set the starting channel number of the first ALTGX
instance controlled by the dynamic reconfiguration controller
to 0. Set the starting channel number of the consecutive
ALTGX instances controlled by the same dynamic
reconfiguration controller, if any, in the next available
multiples of 4.
Description
Stratix IV Device Handbook Volume 3
“Guidelines for Specifying
the Input Reference Clocks”
section in the
Reconfiguration in
Stratix IV Devices
“Logical Channel
Addressing while
Reconfiguring the PMA
Controls” section in the
Dynamic Reconfiguration in
Stratix IV Devices
Reference
Table 1–8
Dynamic
chapter.
chapter.
lists
1–29
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