EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 445

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

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SIV52001-4.2
Overview
Stratix IV Device Handbook Volume 2: Transceivers
February 2011
February 2011
SIV52001-4.2
f
f
This chapter provides details about Stratix
transceiver channels, available modes, and a description of transmitter and receiver
channel datapaths.
For information about upcoming Stratix IV device features, refer to the
Stratix IV Device Features
For information about changes to the currently published Stratix IV Device Handbook,
refer to the
Stratix IV FPGAs deliver a breakthrough level of system bandwidth and power
efficiency for high-end applications, allowing you to innovate without compromise
with two offerings: Stratix IV GX and Stratix IV GT.
Stratix IV GX devices are part of the Altera
Stratix IV GX devices provide up to 32 full-duplex CDR-based transceivers with
physical coding sublayer (PCS) and physical medium attachment (PMA), at serial
data rates between 600 Mbps and 8.5 Gbps. Also, Stratix IV GX provides up to
16 additional full-duplex CDR-based transceivers with PMA supporting serial data
rates between 600 Mbps and 6.5 Gbps.
the transceiver channels support.
Table 1–1. Serial Protocols Supported by the Stratix IV GX Transceiver Channels
To implement proprietary protocols, the transceiver channels in the Stratix IV GX
device supports the highly flexible Basic single-width (600 Mbps to 3.75 Gbps) and
Basic double-width (1 Gbps to 8.5 Gbps) functional modes.
PCI Express
XAUI
GIGE
Serial RapidIO
SONET/SDH
(OIF) CEI PHY Interface
Serial Digital Interface (SDI)
®
Addendum to the Stratix IV Device Handbook
Protocol
(PCIe)
®
1. Transceiver Architecture in Stratix IV
document.
Gen 1 at 2.5 Gbps and Gen 2 at 5.0 Gbps
3.125 Gbps to 3.75 Gbps for HiGig support
1.25 Gbps
1.25 Gbps, 2.5 Gbps, and 3.125 Gbps
OC-12 at 622 Mbps, OC-48 at 2.488 Gbps, and
OC-96 at 4.976 Gbps
4.976 Gbps to 6.375 Gbps for Interlaken support
HD-SDI at 1.485 Gbps and 1.4835 Gbps
3G-SDI at 2.97 Gbps and 2.967 Gbps
Table 1–1
®
®
IV GX and GT transceiver architecture,
40 nm Stratix IV device family.
lists the Stratix IV GX serial protocols
Description
chapter.
Upcoming
Devices
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