EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 945

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Examples
Table 5–19. Logical Channel Addressing Combination ×4 Bonded Channels (Example 2) (Part 2 of 2)
Figure 5–44. Logical Channel Addresses for Example 2
February 2011 Altera Corporation
Settings in Reconfiguration
settings page
reconfig_fromgxb1 and
reconfig_fromgxb2
outputs
Set the What is the number of channels
controlled by the reconfig controller?
ALTGX Setting
ALTGX_RECONFIG Instance
reconfig_fromgxb[16:0] *
ALTGX Settings and Instances
option = 4
Figure 5–44
on what you set as the starting channel number.
reconfig_fromgxb1 is
17 bits wide
Enable Channel and
Transmitter PLL
reconfiguration
Enable Channel interface
Set 2 for the How many
clock inputs are used?
option.
Set 0 for the XAUI ALTGX
instance.
Set 1 for the PCIe Gen2 ×4
ALTGX instance for the
What is the selected
input clock source for
Tx/Rx PLLs? option.
ALTGX Instance 1
shows how the logical channel addresses of all the channels are set based
(XAUI Mode)
reconfig_fromgxb[16:0]
XAUI/PCI Express (PIPE) Gen2 x4 Functional Mode
reconfig_fromgxb input
ALTGX_RECONFIG Setting
Four regular transceiver channels
(logical channel address = 2)
(logical channel address = 3)
(logical channel address = 1)
(logical channel address = 0)
Starting channel number = 0
ALTGX_RECONFIG Setting and Instance
ALTGX Instance 1
Channel 2
Channel 3
Channel 1
Channel 0
Stratix IV Device Handbook Volume 2: Transceivers
reconfig_fromgxb is
17 bits wide
(4 regular transceiver
channels can logically fit into
1 transceiver blocks;
1 * 17 = 17)
ALTGX_RECONFIG
reconfig_togxb[3:0]
Instance 1
5–99

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