EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 775
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H40I3
Manufacturer:
ALTERA
Quantity:
325
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
SHARP
Quantity:
1 200
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA
Quantity:
490
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
- Current page: 775 of 1154
- Download datasheet (32Mb)
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Combining Channels Configured in Protocol Functional Modes
Figure 3–9. Examples of Supported and Unsupported Configurations to Combine Instances in Basic ×8 Mode
February 2011 Altera Corporation
Two Adjacent Transceiver Blocks
Basic mode and ×8 sub-protocol
Receiver and Transmitter
(any functional mode)
1
Receiver only
Configuration
2 Channels
Instance 1
6 Channels
Supported
Instance 0
Each receiver channel configured in Basic ×8 functional mode is clocked
independently by the recovered clock from its receiver CDR. You can use the available
receiver channels in any configuration.
unsupported configuration in Basic ×8 mode.
When the eight regular channels are used up in bonded ×8 functional mode:
■
If the ATX PLL is used to generate clocks for the ×8 functional mode shown in
Figure
transceiver block) in Basic (PMA Direct) ×N mode. Within Basic (PMA Direct) ×N
mode, you can configure the CMU0 channels in the master and slave transceiver
block only in single-width mode (use the single-width mode option in the
General screen). If a CMU1 channel or regular channels are available for use, you
can use them in Basic (PMA Direct) ×N mode in single-width or double-width
configuration.
3–10, you can use the four CMU channels (two from the master and slave
Two Adjacent Transceiver Blocks
Basic mode and ×4 sub-protocol
Receiver and Transmitter
Transmitter and Receiver
(Basic [PMA Direct] xN
Functional mode)
Configuration
Supported
6 Channels
Instance 0
Instance 1
1 Channel
Figure 3–9
Stratix IV Device Handbook Volume 2: Transceivers
shows examples of supported and
Two Adjacent Transceiver Blocks
Basic mode and ×8 sub-protocol
Transmitter only (any mode other than
Basic [PMA Direct] function mode)
Receiver and Transmitter
Configuration
Unsupported
6 Channels
Instance 0
Instance 1
2 Channels
Red: Unsupported
3–21
Related parts for EP4SE530H40I3
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: