EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 211

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 6: I/O Features in Stratix IV Devices
Termination Schemes for I/O Standards
Figure 6–27. SSTL I/O Standard Termination
February 2011 Altera Corporation
OCT
in Bi-
Directional
Pins
Termination
External
On-Board
Termination
OCT
Transmit
OCT
Receive
Stratix IV
Series OCT 50 Ω
Stratix IV
Series OCT
50 Ω
Transmitter
1
Transmitter
Transmitter
V
CCIO
In Stratix IV devices, you cannot use series and parallel OCT simultaneously. For
more information, refer to
100 Ω
100 Ω
SSTL Class I
25 Ω
25 Ω
50 Ω
50 8
50 Ω
V REF
V REF
50 Ω
50 Ω
50 Ω
V REF
V REF
V TT
50 Ω
V TT
V
Stratix IV
V CCIO
CCIO
100 Ω
100 Ω
100 Ω
100 Ω
Receiver
Receiver
Stratix IV
Parallel OCT
Series
OCT 50 Ω
Receiver
“Dynamic On-Chip Termination” on page
Series OCT
25 Ω
Stratix IV
Series OCT
Stratix IV
Transmitter
Transmitter
Transmitter
25 Ω
V
CCIO
100 Ω
100 Ω
25 Ω
25 Ω
50 Ω
V TT
SSTL Class II
50 Ω
V TT
50 Ω
V TT
50 Ω
50 Ω
Stratix IV Device Handbook Volume 1
50 8
50 Ω
V REF
50 Ω
V REF
V REF
50 Ω
V TT
V TT
V
Stratix IV
6–29.
V
CCIO
CCIO
100 Ω
100 Ω
100 Ω
100 Ω
Receiver
Receiver
Receiver
Series
OCT 25 Ω
Stratix IV
Parallel OCT
6–39