EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 785

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Combining Transceiver Channels in Basic (PMA Direct) Configurations
Table 3–10. Basic (PMA Direct) ×1 and Non-Basic (PMA Direct) Configurations at Different Data Rates for Example 7
February 2011 Altera Corporation
inst0
inst1
inst2
Instances
1
(one channel in Transmitter
(three channels in Receiver
Basic (PMA Direct) ×1
Basic (PMA Direct) ×1
Only configuration)
and Transmitter
Configuration
configuration)
Example 7
Consider the example design listed in
non-Basic (PMA Direct) configurations at different data rates.
Figure 3–16
before compilation.
The data rate configurations of the two CMU PLLs are different.
Figure 3–16. Logical View of the Basic (PMA Direct) ×1 and Non-Basic (PMA Direct)
Configurations Before Compilation for Example 7
GIGE
shows Basic (PMA Direct) ×1 and non-Basic (PMA Direct) configurations
Inst1: Basic (PMA Direct) x1 mode
Inst2: Basic (PMA Direct) x1 mode
Inst0: GIGE functional mode
Number of channels = 1
Number of channels = 3
Number of channels = 1
Data Rate (Gbps)
CMU PLL Base
1.25
2
2
Table 3–10
Effective Data Rate (Gbps)
Transmitter Channel
Stratix IV Device Handbook Volume 2: Transceivers
for Basic (PMA Direct) ×1 and
1.25
2
2
(1.25 Gbps)
CMU PLL
CMU PLL
CMU PLL
(2 Gbps)
(2 Gbps)
(assume refclk0)
Clock Frequency
Input Reference
refclk1
refclk1
(MHz)
125
3–31