HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 1002

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 25 Electrical Characteristics
Rev. 4.00 Sep. 14, 2005 Page 952 of 982
REJ09B0023-0400
A12/A11*
D31 to D0
A25 to A0
DACKn,
TENDn *
RASU/L
CASU/L
RD/WR
DQMxx
CKIO
CKE
Figure 25.40 Synchronous DRAM Access Timing in Low-Frequency Mode
CSn
BS
1
2
Note:
1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn and TENDn when active low is selected.
t
t
t
t
t
t
RASD2
CASD2
t
RWD2
DQMD2
t
CSD2
DACD
AD3
AD3
Tr
address
Row
t
t
RASD2
CASD2
t
t
t
AD3
AD3
(Auto-Precharge, TRWL = 2 Cycles)
BSD
t
Tc
RDH4
(High)
Command
address
Column
ReadA
t
t
CASD2
t
t
t
DACD
BSD
AD3
AD3
t
Td1
RDS4
t
t
DQMD2
CSD2
Tde
Tap
t
t
t
t
RASD2
DQMD2
t
t
CSD2
DACD
AD3
AD3
Tr
address
Row
t
t
t
RASD2
CASD2
t
RWD2
t
t
t
WDD3
AD3
AD3
BSD
Tc
(High)
Command
WriteA
t
t
t
t
t
t
RWD2
CASD2
CSD2
DQMD2
t
DACD
t
WDH3
address
Column
BSD
Tnop
AD3
t
t
AD3
AD3
Trw1
Tap