HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 994

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 25 Electrical Characteristics
Rev. 4.00 Sep. 14, 2005 Page 944 of 982
REJ09B0023-0400
(Bank Active Mode: READ Command, Same Row Address, CAS Latency 2, WTRCD = 0 Cycle)
Figure 25.32 Synchronous DRAM Burst Read Bus Cycle (Four Read Cycles)
A12/A11*
D31 to D0
A25 to A0
DACKn*
RASU/L
CASU/L
RD/WR
DQMxx
CKIO
CKE
CSn
BS
1
2
Note:
t
t
t
t
t
t
AD1
t
t
CSD1
t
RWD1
CASD1
BSD
RASD1
DQMD1
DACD
AD1
Tc1
1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn when active low is selected.
address
Column
t
AD1
Tc2
Read command
Td1
Tc3
t
RDS2
(High)
t
RDH2
Td2
Tc4
t
t
BSD
t
CASD1
AD1
Td3
Td4
t
RDS2
t
t
t
RDH2
CSD1
t
DQMD1
DACD
Tde
t
t
RWD1
AD1