HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 96

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
Table 2.7
Immediate Data: Byte immediate data is placed inside the instruction code. Word and longword
immediate data is not placed inside the instruction code, but in a table in memory. The table in
memory is referenced with an immediate data transfer instruction (MOV) using PC-relative
addressing mode with displacement.
Table 2.8
Note: Immediate data is referenced by @(disp,PC).
Absolute Addresses: When data is referenced by an absolute address, the absolute address value
is placed in a table in memory beforehand. Using the method whereby immediate data is loaded
when an instruction is executed, this value is transferred to a register and the data is referenced
using register indirect addressing mode.
Rev. 4.00 Sep. 14, 2005 Page 46 of 982
REJ09B0023-0400
This LSI's CPU
CMP/GE
BT
BF
ADD
CMP/EQ
BT
Type
8-bit immediate
16-bit immediate
32-bit immediate
R1,R0
TRGET0
TRGET1
#–1,R0
#0,R0
TRGET
T Bit
Immediate Data Referencing
This LSI's CPU
MOV
MOV.W
.DATA.W
MOV.L
.DATA.L
Description
If R0 ≥ R1, the T bit is set.
A branch is made to TRGET0
if R0 ≥ R1, or to TRGET1 if R0 < R1.
The T bit is not set by ADD.
If R0 = 0, the T bit is set.
A branch is made if R0 = 0.
........
........
#H'12,R0
@(disp,PC),R0
H'1234
@(disp,PC),R0
H'12345678
Example of Other CPU
MOV.B
MOV.W
MOV.L
Example of Other CPU
CMP.W
BGE
BLT
SUB.W
BEQ
#H'12,R0
#H'1234,R0
#H'12345678,R0
R1,R0
TRGET0
TRGET1
#1,R0
TRGET