HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 520

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 15 User Debugging Interface (H-UDI)
15.4.4
An H-UDI reset is executed by inputting an H-UDI reset assert command in SDIR. An H-UDI
reset is of the same kind as a power-on reset. An H-UDI reset is released by inputting an H-UDI
reset negate command. The required time between the H-UDI reset assert command and H-UDI
reset negate command is the same as time for keeping the RESETP pin low to apply a power-on
reset.
15.4.5
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in the
SDIR. An H-UDI interrupt is a general exception/interrupt operation, resulting in a branch to an
address based on the VBR value plus offset, and with return by the RTE instruction. This interrupt
request has a fixed priority level of 15.
H-UDI interrupts are accepted in sleep mode.
Rev. 4.00 Sep. 14, 2005 Page 470 of 982
REJ09B0023-0400
Chip internal reset
TCK
TDO
(when the H-UDI
command is set)
TDO
(when the boundary scan
command is set)
CPU state
H-UDI Reset
H-UDI Interrupt
SDIR
H-UDI reset assert
Figure 15.3 H-UDI Data Transfer Timing
Figure 15.4 H-UDI Reset
t
TDOD
H-UDI reset negate
t
TDOD
Branch to H'A0000000