HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 446

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Bus State Controller (BSC)
Table 12.22 Minimum Number of Idle Cycles between Access Cycles of the DMAC Single
(1) Transfer from the external device with DACK to the SDRAM interface
Rev. 4.00 Sep. 14, 2005 Page 396 of 982
REJ09B0023-0400
CMNCR.DMAIW
Setting
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Address Mode for the SDRAM Interface
BSC Register Setting*
CS3WCR.WTRP
Setting
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
0
0
0
0
1
1
1
1
2
2
2
2
3
3
2
CS3WCR.TRWL
Setting
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
0
1
Minimum Number of
Idle Cycles
3
3
3
3
3
3
3
4
3
3
4
5
3
4
5
6
3
3
3
3
3
3
3
4
3
3
4
5
3
4