HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 159

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

3.1.5
Shift operations can use either register or immediate value as the shift amount operand. Other
source and destination operands are specified by the register. There are two kinds of shift
operations. Table 3.7 shows the variation of this type of operation. The correspondence between
each operand and registers, except for immediate operands, is the same as the ALU fixed-point
operations as shown in table 3.2.
Table 3.7
Note: –32 <= Imm1 <= +32, –16 <= Imm2 <= +16
Arithmetic Shift: Figure 3.9 shows the arithmetic shift operation flow.
Note: The arithmetic shift operations are basically 40-bit operation, that is, the 32 bits of the
Mnemonic
PSHA Sx, Sy, Dz
PSHL Sx, Sy, Dz
PSHA #Imm1, Dz
PSHL #Imm2, Dz
7g
Shift out
Ignored
Shift amount data:
(Source 2)
0g 31
base precision and 8 bits of the guard-bit parts. So the signed bit is copied to the guard-bit
parts when a register not providing the guard-bit parts is specified as the source operand.
When a register not providing the guard-bit parts is specified as a destination operand, the
lower 32 bits of the operation result are input into the destination register.
Shift Operations
Variation of Shift Operations
Function
Logical shift
Arithmetic shift
Arithmetic shift with
immediate.
Logical shift with
immediate.
7g
Left Shift
16 15
Figure 3.9 Arithmetic Shift Operation Flow
0g 31
> = 0
+32 to –32
23 22 16
6
Imm1
0
Sy
< 0
0
15
0
Source 1
Sx
Sx
Dz
Dz
7g
(MSB copy)
0
0g 31
Rev. 4.00 Sep. 14, 2005 Page 109 of 982
Source 2
Sy
Sy
Imm1
Imm2
Updated
Right Shift
Section 3 DSP Operation
GT
16 15
Z
REJ09B0023-0400
DSR
Destination
Dz
Dz
Dz
Dz
N
V DC
Shift out
0