HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 386

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 12 Bus State Controller (BSC)
Figures 12.15 to 12.17 show examples of the connection of the SDRAM with the LSI.
As shown in figure 12.17, two sets of SDRAMs of 32 Mbytes or smaller can be connected to the
same CS space by using RASU, RASL, CASU, and CASL. In this case, a total of 8 banks are
assigned to the same CS space: 4 banks specified by RASL and CASL, and 4 banks specified by
RAS and CAS. When accessing the address with A25 = 0, RASL and CASL are asserted. When
accessing the address with A25 = 1, RASU and CASU are asserted.
Rev. 4.00 Sep. 14, 2005 Page 336 of 982
REJ09B0023-0400
This LSI
Figure 12.15 Example of 32-Bit Data Width SDRAM Connection
DQMUU
DQMUL
DQMLU
DQMLL
RD/WR
RASU
CASU
RASL
CASL
CKIO
CKE
CSn
D31
D16
D15
A15
D0
A2
Unused
Unused
(RASU and CASU are Not Used)
(1M × 16-bit × 4-bank)
64M SDRAM
A13
A0
CKE
CLK
CS
RAS
CAS
WE
I/O15
I/O0
DQMU
DQML
A13
A0
CKE
CLK
CS
RAS
CAS
WE
I/O15
I/O0
DQMU
DQML