HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 16

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

9.2
9.3
9.4
9.5
9.6
Section 10 Interrupt Controller (INTC)............................................................. 219
10.1 Features.............................................................................................................................. 219
10.2 Input/Output Pins............................................................................................................... 221
10.3 Register Descriptions......................................................................................................... 221
10.4 Interrupt Sources................................................................................................................ 233
10.5 INTC Operation ................................................................................................................. 238
10.6 Notes on Use...................................................................................................................... 240
Rev. 4.00 Sep. 14, 2005 Page xvi of l
9.1.1
9.1.2
9.1.3
Exception Handling Function ............................................................................................ 200
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
Individual Exception Operations ....................................................................................... 205
9.3.1
9.3.2
Exception Processing While DSP Extension Function is Valid......................................... 210
9.4.1
9.4.2
Note on Initializing this LSI .............................................................................................. 216
Usage Notes ....................................................................................................................... 218
10.3.1 Interrupt Priority Registers B to J (IPRB to IPRJ)................................................ 223
10.3.2 Interrupt Control Register 0 (ICR0)...................................................................... 225
10.3.3 Interrupt Control Register 1 (ICR1)...................................................................... 226
10.3.4 Interrupt Control Register 3 (ICR3)...................................................................... 227
10.3.5 Interrupt Request Register 0 (IRR0) ..................................................................... 228
10.3.6 Interrupt Mask Registers 0 to 10 (IMR0 to IMR10) ............................................. 229
10.3.7 Interrupt Mask Clear Registers 0 to 10 (IMCR0 to IMCR10) .............................. 231
10.4.1 NMI Interrupt........................................................................................................ 233
10.4.2 H-UDI Interrupt .................................................................................................... 233
10.4.3 IRQ Interrupts....................................................................................................... 233
10.4.4 On-Chip Peripheral Module Interrupts ................................................................. 234
10.4.5 Interrupt Exception Handling and Priority............................................................ 235
10.5.1 Interrupt Sequence ................................................................................................ 238
10.5.2 Multiple Interrupts ................................................................................................ 240
10.6.1 Notes on USB Bus Power Control........................................................................ 240
TRAPA Exception Register (TRA) ...................................................................... 198
Exception Event Register (EXPEVT)................................................................... 199
Interrupt Event Register 2 (INTEVT2)................................................................. 199
Exception Handling Flow ..................................................................................... 200
Exception Vector Addresses................................................................................. 201
Exception Codes ................................................................................................... 201
Exception Request and BL Bit (Multiple Exception Prevention) ......................... 201
Exception Source Acceptance Timing and Priority .............................................. 202
Resets.................................................................................................................... 205
General Exceptions............................................................................................... 206
Illegal Instruction Exception and Slot Illegal Instruction Exception .................... 210
Exception in Repeat Control Period ..................................................................... 210