HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 425

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

• Deep power-down mode
If the RMODE bit in the SDCR is set to 1 while the DEEP and RFSH bits in the SDCR are set to
1, the low-power SDRAM enters the deep power-down mode. If the RMODE bit is cleared to 0,
the CKE signal is pulled high to cancel the deep power-down mode. Before executing an access
after returning from the deep power-down mode, the power-up sequence must be re-executed.
The low-power SDRAM supports the deep power-down mode as a low-power consumption
mode. In the partial self-refresh function, self-refresh is performed on a specific area. In the
deep power-down mode, self-refresh will not be performed on any memory area. This mode is
effective in systems where all of the system memory areas are used as work areas.
RASL, RASU
CASL, CASU
A12/A11*
D31 to D0
A25 to A0
DACKn*
RD/WR
DQMxx
CKIO
CKE
CSn
BS
Figure 12.35 Deep Power-Down Mode Transition Timing
1
2
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
Tp
2. The waveform for DACKn is when active low is specified.
Tpw
Tdpd
Trc
Trc
Rev. 4.00 Sep. 14, 2005 Page 375 of 982
Section 12 Bus State Controller (BSC)
Hi-Z
Trc
Trc
Trc
REJ09B0023-0400