HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 996

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 25 Electrical Characteristics
Rev. 4.00 Sep. 14, 2005 Page 946 of 982
REJ09B0023-0400
(Bank Active Mode: ACT + WRITE Commands, WTRCD = 0 Cycle, TRWL = 0 Cycle)
Figure 25.34 Synchronous DRAM Burst Write Bus Cycle (Four Write Cycles)
A12/A11*
D31 to D0
A25 to A0
DACKn*
RASU/L
CASU/L
RD/WR
DQMxx
CKIO
CKE
CSn
BS
1
2
Note:
1. An address pin to be connected to pin A10 of SDRAM.
2. Waveform for DACKn when active low is selected.
t
t
t
t
t
DQMD1
RWD1
CSD1
RASD1
DACD
t
t
AD1
AD1
Tr
address
Row
t
t
t
BSD
RWD1
t
WDD2
t
RASD1
t
t
CASD1
AD1
AD1
Tc1
(High)
t
WDH2
t
AD1
Column
address
Tc2
Write command
t
AD1
Tc3
t
WDD2
t
AD1
Tc4
t
t
t
t
WDH2
BSD
CASD1
t
RWD1
t
t
t
CSD1
DQMD1
t
DACD
AD1
AD1