HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 526

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 16 I
16.3
The I
• I
• I
• I
• I
• I
• I
• I
• I
• I
• NF2CYC register (NF2CYC)
16.3.1
ICCR1 is an 8-bit readable/writable register that enables or disables the I
controls transmission or reception, and selects master or slave mode, transmission or reception,
and transfer clock frequency in master mode.
ICCR1 is initialized to H'00 by a power-on reset.
Rev. 4.00 Sep. 14, 2005 Page 476 of 982
REJ09B0023-0400
Bit
7
6
2
2
2
2
2
2
2
2
2
C bus control register 1 (ICCR1)
C bus control register 2 (ICCR2)
C bus mode register (ICMR)
C bus interrupt enable register (ICIER)
C bus status register (ICSR)
C bus slave address register (SAR)
C bus transmit data register (ICDRT)
C bus receive data register (ICDRR)
C bus shift register (ICDRS)
2
C bus interface 2 has the following registers:
Register Descriptions
I
2
Bit Name
ICE
RCVD
2
C Bus Control Register 1 (ICCR1)
C Bus Interface 2 (IIC2)
Initial
Value
0
0
R/W
R/W
R/W
Description
I
0: This module is halted. (SCL and SDA pins are set to
1: This bit is enabled for transfer operations. (SCL and
Reception Disable
This bit enables or disables the next operation when
TRS is 0 and ICDRR is read.
0: Enables next reception
1: Disables next reception
2
C Bus Interface Enable
port function.)
SDA pins are bus drive state.)
2
C bus interface 2,