HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 475

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Figure 13.2 is a flowchart of this procedure.
Notes: 1. In auto-request mode, transfer begins when NMIF and TE are all 0 and the DE and DME bits are
2. DREQ = level detection in burst mode (external request) or cycle-steal mode.
3. DREQ = edge detection in burst mode (external request), or auto-request mode in burst mode.
DMATCR – 1 → DMATCR, SAR and
DEI interrupt request (when IE = 1)
(SAR, DAR, DMATCR, CHCR,
set to 1.
Transfer (1 transfer unit);
or AE = 1 or DE = 0
NMIF, AE, TE = 0?
DMAOR, DMARS)
Initial settings
DE, DME = 1 and
Transfer request
DMATCR = 0?
DAR updated
or DME = 0?
Yes
Transfer end
Yes
Yes
occurs?*
Yes
NMIF = 1
TE = 1
Start
Figure 13.2 DMA Transfer Flowchart
1
No
No
No
No
Normal end
Section 13 Direct Memory Access Controller (DMAC)
*
3
DREQ detection selection
Rev. 4.00 Sep. 14, 2005 Page 425 of 982
transfer request mode,
or AE = 1 or DE = 0
Transfer aborted
or DME = 0?
Bus mode,
Yes
NMIF = 1
system
*
2
REJ09B0023-0400
No