HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 241

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HD6417641

Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Data Array Read: The data specified by L (bits 3 and 2) in the address is read from the entry
address specified by the address and the entry corresponding to the way.
Data Array Write: The longword data specified by the data is written to the position specified by
L (bits 3 and 2) in the address from the entry address specified by the address and the entry
corresponding to the way.
1.
2.
(a) Address specification
(b) Data specification (both read and write accesses)
(a) Address specification
(b) Data specification
[Legend]
*:
X:
Address array access
Data array access (both read and write accesses)
Figure 7.4 Specifying Address and Data for Memory-Mapped Cache Access
Don't care bit
0 for read, don't care for write
Read access
Write access
0
31
31
31 30 29
31
31
1111 0000
1111 0000
1111 0001
0
0
24
24
24
Address tag (28 to 10)
23
23
23
* ………… *
* ………… *
* ………… *
14
14
14
13
13
13
Longword
W
W
W
12
12
12
11
11
10
11
Entry
Entry
9
Entry
Rev. 4.00 Sep. 14, 2005 Page 191 of 982
LRU
4
4
4
4
3
3
3
3
A
0
X
L
X
2
0
2
0
2
2
REJ09B0023-0400
Section 7 Cache
1
0
0
0
1
U
0
0
0
0
0
0
V
0
0

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