HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 552

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 16 I
16.4.8
Flowcharts in respective modes that use the I
Rev. 4.00 Sep. 14, 2005 Page 502 of 982
REJ09B0023-0400
Example of Use
2
C Bus Interface 2 (IIC2)
No
No
No
Write transmit data in ICDRT
Write transmit data in ICDRT
Figure 16.18 Sample Flowchart for Master Transmit Mode
No
No
No
Set MST to 1 and TRS
Read ACKBR in ICIER
Read BBSY in ICCR2
Read TDRE in ICSR
Read TEND in ICSR
Clear TEND in ICSR
Clear STOP in ICSR
Read STOP in ICSR
Clear TDRE in ICSR
Read TEND in ICSR
Write transmit data
Set MST and TRS
Write 1 to BBSY
Write 0 to BBSY
to 0 in ICCR1
in ICCR1 to 1
and 0 to SCP
ACKBR=0 ?
TEND=1 ?
TDRE=1 ?
TEND=1 ?
STOP=1 ?
BBSY=0 ?
Last byte?
in ICDRT
Transmit
Initialize
and SCP
mode?
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
Mater receive mode
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Wait for last byte to be transmitted.
[11] Clear the TEND flag.
[12] Clear the STOP flag.
[13] Issue the stop condition.
[14] Wait for the creation of stop condition.
[15] Set slave receive mode. Clear TDRE.
Test the status of the SCL and SDA lines.
Set master transmit mode.
Issue the start candition.
Set the first byte (slave address + R/W) of transmit data.
Wait for 1 byte to be transmitted.
Test the acknowledge transferred from the specified slave device.
Set the second and subsequent bytes (except for the final byte) of transmit data.
Wait for ICDRT empty.
Set the last byte of transmit data.
2
C bus interface are shown in figures 16.18 to 16.21.