HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 680

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18 Multi-Function Timer Pulse Unit (MTU)
18.7.6
When a compare match occurs in the T2 state of a TGR write cycle, the TGR write is executed
and the compare match signal is generated.
Figure 18.73 shows the timing in this case.
18.7.7
If a compare match occurs in the T1 state of a TGR write cycle, the data that is transferred to TGR
by the buffer operation differs depending on channel 0 and channels 3 and 4: data on channel 0 is
that after write, and on channels 3 and 4, before write.
Figures 18.74 and 18.75 show the timing in this case.
Rev. 4.00 Sep. 14, 2005 Page 630 of 982
REJ09B0023-0400
Pφ
Address
Write signal
Compare
match signal
TCNT
TGR
Conflict between TGR Write and Compare Match
Conflict between Buffer Register Write and Compare Match
Figure 18.73 Conflict between TGR Write and Compare Match
TGR write data
N
N
TGR write cycle
TGR address
T1
T2
N+1
M