HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 108

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
2.4.3
Table 2.13 shows the instruction formats, and the meaning of the source and destination operands,
for instructions executed by the CPU core. The meaning of the operands depends on the
instruction code. The following symbols are used in the table.
xxxx:
mmmm: Source register
nnnn:
iiii:
dddd:
Table 2.13 CPU Instruction Formats
Rev. 4.00 Sep. 14, 2005 Page 58 of 982
REJ09B0023-0400
Instruction Format
0 type
15
n type
15
m type
15
xxxx
xxxx
xxxx
mmmm
xxxx
nnnn
CPU Instruction Formats
Instruction code
Destination register
Immediate data
Displacement
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
0
0
0
Source
Operand


Control register or
system register
Control register or
system register
mmmm: register
direct
mmmm: post-
increment register
indirect
mmmm: register
indirect
PC-relative using
Rm
Destination
Operand

nnnn: register
direct
nnnn: register
direct
nnnn: pre-
decrement register
indirect
Control register or
system register
Control register or
system register


Sample Instruction
NOP
MOV T Rn
STS
STC.L
LDC
LDC.L
JMP
BRAF
MACH,Rn
SR,@-Rn
Rm,SR
@Rm+,SR
@Rm
Rm