HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 255

• Manufacturer Part Number: HD6417641
• Manufacturer: RENESAS [Renesas Technology Corp]

9.3
This section describes the conditions for specific exception handling, and the processor operations.
9.3.1
Power-On Reset:
• Conditions
• Operations
Manual Reset:
• Conditions
• Operations
H-UDI Reset:
• Conditions
• Operations
Power-on reset is request
Set EXPEVT to H'000, initialize the CPU and on-chip peripheral modules, and branch to the
reset vector H'A0000000. For details, refer to the register descriptions in the relevant sections.
Manual reset is request
Set EXPEVT to H'020, initialize the CPU and on-chip peripheral modules, and branch to the
reset vector H'A0000000. For details, refer to the register descriptions in the relevant sections.
The H-UDI reset command is entered (See section 15.4.4, H-UDI Reset.)
Set EXPEVT to H'000, initialize the VBR and SR, and branch to the PC H'A0000000.
The VBR register is set to H'00000000 by initialization. For the SR, the BL and RB bits are set
to 1 and the interrupt mask bits (I3 to I0) are set to 1111.
Initialize the CPU and on-chip peripheral modules. For details, refer to the register descriptions
in the relevant sections.
Individual Exception Operations
Resets
Rev. 4.00 Sep. 14, 2005 Page 205 of 982
Section 9 Exception Handling
REJ09B0023-0400